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  <body><table style="margin: 0 auto;"><tr><td><div class="topbar"><a href="AArch32-regindex.html">AArch32 Registers</a></div></td><td><div class="topbar"><a href="AArch64-regindex.html">AArch64 Registers</a></div></td><td><div class="topbar"><a href="AArch32-sysindex.html">AArch32 Instructions</a></div></td><td><div class="topbar"><a href="AArch64-sysindex.html">AArch64 Instructions</a></div></td><td><div class="topbar"><a href="enc_index.html">Index by Encoding</a></div></td><td><div class="topbar"><a href="ext_alpha_index.html">External Registers</a></div></td><td><div class="topbar"><a href="ext_enc_index.html">External Registers by Offset</a></div></td><td><div class="topbar"><a href="func_index.html">Registers by Functional Group</a></div></td><td><div class="topbar"><a href="notice.html">Proprietary Notice</a></div></td></tr></table><hr/><h1 class="alphindextitle">External registers</h1>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcfgr.html">AMCFGR</a>:
        Activity Monitors Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcgcr.html">AMCGCR</a>:
        Activity Monitors Counter Group Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcidr0.html">AMCIDR0</a>:
        Activity Monitors Component Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcidr1.html">AMCIDR1</a>:
        Activity Monitors Component Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcidr2.html">AMCIDR2</a>:
        Activity Monitors Component Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcidr3.html">AMCIDR3</a>:
        Activity Monitors Component Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcntenclr0.html">AMCNTENCLR0</a>:
        Activity Monitors Count Enable Clear Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcntenclr1.html">AMCNTENCLR1</a>:
        Activity Monitors Count Enable Clear Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcntenset0.html">AMCNTENSET0</a>:
        Activity Monitors Count Enable Set Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcntenset1.html">AMCNTENSET1</a>:
        Activity Monitors Count Enable Set Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amcr.html">AMCR</a>:
        Activity Monitors Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amdevaff0.html">AMDEVAFF0</a>:
        Activity Monitors Device Affinity Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amdevaff1.html">AMDEVAFF1</a>:
        Activity Monitors Device Affinity Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amdevarch.html">AMDEVARCH</a>:
        Activity Monitors Device Architecture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amdevtype.html">AMDEVTYPE</a>:
        Activity Monitors Device Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amevcntr0n.html">AMEVCNTR0&lt;n&gt;</a>:
        Activity Monitors Event Counter Registers 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amevcntr1n.html">AMEVCNTR1&lt;n&gt;</a>:
        Activity Monitors Event Counter Registers 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amevtyper0n.html">AMEVTYPER0&lt;n&gt;</a>:
        Activity Monitors Event Type Registers 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amevtyper1n.html">AMEVTYPER1&lt;n&gt;</a>:
        Activity Monitors Event Type Registers 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-amiidr.html">AMIIDR</a>:
        Activity Monitors Implementation Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ampidr0.html">AMPIDR0</a>:
        Activity Monitors Peripheral Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ampidr1.html">AMPIDR1</a>:
        Activity Monitors Peripheral Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ampidr2.html">AMPIDR2</a>:
        Activity Monitors Peripheral Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ampidr3.html">AMPIDR3</a>:
        Activity Monitors Peripheral Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ampidr4.html">AMPIDR4</a>:
        Activity Monitors Peripheral Identification Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-asicctl.html">ASICCTL</a>:
        CTI External Multiplexer Control register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntacrn.html">CNTACR&lt;n&gt;</a>:
        Counter-timer Access Control Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntcr.html">CNTCR</a>:
        Counter Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntcv.html">CNTCV</a>:
        Counter Count Value register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntel0acr.html">CNTEL0ACR</a>:
        Counter-timer EL0 Access Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntfid0.html">CNTFID0</a>:
        Counter Frequency ID</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntfidn.html">CNTFID&lt;n&gt;</a>:
        Counter Frequency IDs, n &gt; 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntfrq.html">CNTFRQ</a>:
        Counter-timer Frequency</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntid.html">CNTID</a>:
        Counter Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntnsar.html">CNTNSAR</a>:
        Counter-timer Non-secure Access Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntpct.html">CNTPCT</a>:
        Counter-timer Physical Count</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntp_ctl.html">CNTP_CTL</a>:
        Counter-timer Physical Timer Control</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntp_cval.html">CNTP_CVAL</a>:
        Counter-timer Physical Timer CompareValue</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntp_tval.html">CNTP_TVAL</a>:
        Counter-timer Physical Timer TimerValue</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntscr.html">CNTSCR</a>:
        Counter Scale Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntsr.html">CNTSR</a>:
        Counter Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cnttidr.html">CNTTIDR</a>:
        Counter-timer Timer ID Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntvct.html">CNTVCT</a>:
        Counter-timer Virtual Count</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntvoff.html">CNTVOFF</a>:
        Counter-timer Virtual Offset</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntvoffn.html">CNTVOFF&lt;n&gt;</a>:
        Counter-timer Virtual Offsets</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntv_ctl.html">CNTV_CTL</a>:
        Counter-timer Virtual Timer Control</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntv_cval.html">CNTV_CVAL</a>:
        Counter-timer Virtual Timer CompareValue</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cntv_tval.html">CNTV_TVAL</a>:
        Counter-timer Virtual Timer TimerValue</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-counteridn.html">CounterID&lt;n&gt;</a>:
        Counter ID registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctiappclear.html">CTIAPPCLEAR</a>:
        CTI Application Trigger Clear register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctiapppulse.html">CTIAPPPULSE</a>:
        CTI Application Pulse register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctiappset.html">CTIAPPSET</a>:
        CTI Application Trigger Set register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctiauthstatus.html">CTIAUTHSTATUS</a>:
        CTI Authentication Status register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctichinstatus.html">CTICHINSTATUS</a>:
        CTI Channel In Status register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctichoutstatus.html">CTICHOUTSTATUS</a>:
        CTI Channel Out Status register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cticidr0.html">CTICIDR0</a>:
        CTI Component Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cticidr1.html">CTICIDR1</a>:
        CTI Component Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cticidr2.html">CTICIDR2</a>:
        CTI Component Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cticidr3.html">CTICIDR3</a>:
        CTI Component Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cticlaimclr.html">CTICLAIMCLR</a>:
        CTI CLAIM Tag Clear register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cticlaimset.html">CTICLAIMSET</a>:
        CTI CLAIM Tag Set register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-cticontrol.html">CTICONTROL</a>:
        CTI Control register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevaff0.html">CTIDEVAFF0</a>:
        CTI Device Affinity register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevaff1.html">CTIDEVAFF1</a>:
        CTI Device Affinity register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevarch.html">CTIDEVARCH</a>:
        CTI Device Architecture register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevctl.html">CTIDEVCTL</a>:
        CTI Device Control register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevid.html">CTIDEVID</a>:
        CTI Device ID register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevid1.html">CTIDEVID1</a>:
        CTI Device ID register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevid2.html">CTIDEVID2</a>:
        CTI Device ID register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctidevtype.html">CTIDEVTYPE</a>:
        CTI Device Type register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctigate.html">CTIGATE</a>:
        CTI Channel Gate Enable register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctiinenn.html">CTIINEN&lt;n&gt;</a>:
        CTI Input Trigger to Output Channel Enable registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctiintack.html">CTIINTACK</a>:
        CTI Output Trigger Acknowledge register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctiitctrl.html">CTIITCTRL</a>:
        CTI Integration mode Control register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctilar.html">CTILAR</a>:
        CTI Lock Access Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctilsr.html">CTILSR</a>:
        CTI Lock Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctioutenn.html">CTIOUTEN&lt;n&gt;</a>:
        CTI Input Channel to Output Trigger Enable registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctipidr0.html">CTIPIDR0</a>:
        CTI Peripheral Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctipidr1.html">CTIPIDR1</a>:
        CTI Peripheral Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctipidr2.html">CTIPIDR2</a>:
        CTI Peripheral Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctipidr3.html">CTIPIDR3</a>:
        CTI Peripheral Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctipidr4.html">CTIPIDR4</a>:
        CTI Peripheral Identification Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctitriginstatus.html">CTITRIGINSTATUS</a>:
        CTI Trigger In Status register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-ctitrigoutstatus.html">CTITRIGOUTSTATUS</a>:
        CTI Trigger Out Status register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgauthstatus_el1.html">DBGAUTHSTATUS_EL1</a>:
        Debug Authentication Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgbcrn_el1.html">DBGBCR&lt;n&gt;_EL1</a>:
        Debug Breakpoint Control Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgbvrn_el1.html">DBGBVR&lt;n&gt;_EL1</a>:
        Debug Breakpoint Value Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgclaimclr_el1.html">DBGCLAIMCLR_EL1</a>:
        Debug CLAIM Tag Clear Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgclaimset_el1.html">DBGCLAIMSET_EL1</a>:
        Debug CLAIM Tag Set Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgdtrrx_el0.html">DBGDTRRX_EL0</a>:
        Debug Data Transfer Register, Receive</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgdtrtx_el0.html">DBGDTRTX_EL0</a>:
        Debug Data Transfer Register, Transmit</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgwcrn_el1.html">DBGWCR&lt;n&gt;_EL1</a>:
        Debug Watchpoint Control Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-dbgwvrn_el1.html">DBGWVR&lt;n&gt;_EL1</a>:
        Debug Watchpoint Value Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edaa32pfr.html">EDAA32PFR</a>:
        External Debug Auxiliary Processor Feature Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edacr.html">EDACR</a>:
        External Debug Auxiliary Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edcidr0.html">EDCIDR0</a>:
        External Debug Component Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edcidr1.html">EDCIDR1</a>:
        External Debug Component Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edcidr2.html">EDCIDR2</a>:
        External Debug Component Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edcidr3.html">EDCIDR3</a>:
        External Debug Component Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edcidsr.html">EDCIDSR</a>:
        External Debug Context ID Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddevaff0.html">EDDEVAFF0</a>:
        External Debug Device Affinity register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddevaff1.html">EDDEVAFF1</a>:
        External Debug Device Affinity register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddevarch.html">EDDEVARCH</a>:
        External Debug Device Architecture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddevid.html">EDDEVID</a>:
        External Debug Device ID register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddevid1.html">EDDEVID1</a>:
        External Debug Device ID Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddevid2.html">EDDEVID2</a>:
        External Debug Device ID register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddevtype.html">EDDEVTYPE</a>:
        External Debug Device Type register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddfr.html">EDDFR</a>:
        External Debug Feature Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-eddfr1.html">EDDFR1</a>:
        External Debug Feature Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edeccr.html">EDECCR</a>:
        External Debug Exception Catch Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edecr.html">EDECR</a>:
        External Debug Execution Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edesr.html">EDESR</a>:
        External Debug Event Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edhsr.html">EDHSR</a>:
        External Debug Halting Syndrome Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-editctrl.html">EDITCTRL</a>:
        External Debug Integration mode Control register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-editr.html">EDITR</a>:
        External Debug Instruction Transfer Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edlar.html">EDLAR</a>:
        External Debug Lock Access Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edlsr.html">EDLSR</a>:
        External Debug Lock Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edpcsr.html">EDPCSR</a>:
        External Debug Program Counter Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edpfr.html">EDPFR</a>:
        External Debug Processor Feature Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edpidr0.html">EDPIDR0</a>:
        External Debug Peripheral Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edpidr1.html">EDPIDR1</a>:
        External Debug Peripheral Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edpidr2.html">EDPIDR2</a>:
        External Debug Peripheral Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edpidr3.html">EDPIDR3</a>:
        External Debug Peripheral Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edpidr4.html">EDPIDR4</a>:
        External Debug Peripheral Identification Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edprcr.html">EDPRCR</a>:
        External Debug Power/Reset Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edprsr.html">EDPRSR</a>:
        External Debug Processor Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edrcr.html">EDRCR</a>:
        External Debug Reserve Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edscr.html">EDSCR</a>:
        External Debug Status and Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edscr2.html">EDSCR2</a>:
        External Debug Status and Control Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edvidsr.html">EDVIDSR</a>:
        External Debug Virtual Context Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-edwar.html">EDWAR</a>:
        External Debug Watchpoint Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnaddr.html">ERR&lt;n&gt;ADDR</a>:
        Error Record &lt;n&gt; Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnctlr.html">ERR&lt;n&gt;CTLR</a>:
        Error Record &lt;n&gt; Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnfr.html">ERR&lt;n&gt;FR</a>:
        Error Record &lt;n&gt; Feature Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnmisc0.html">ERR&lt;n&gt;MISC0</a>:
        Error Record &lt;n&gt; Miscellaneous Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnmisc1.html">ERR&lt;n&gt;MISC1</a>:
        Error Record &lt;n&gt; Miscellaneous Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnmisc2.html">ERR&lt;n&gt;MISC2</a>:
        Error Record &lt;n&gt; Miscellaneous Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnmisc3.html">ERR&lt;n&gt;MISC3</a>:
        Error Record &lt;n&gt; Miscellaneous Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnpfgcdn.html">ERR&lt;n&gt;PFGCDN</a>:
        Error Record &lt;n&gt; Pseudo-fault Generation Countdown Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnpfgctl.html">ERR&lt;n&gt;PFGCTL</a>:
        Error Record &lt;n&gt; Pseudo-fault Generation Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnpfgf.html">ERR&lt;n&gt;PFGF</a>:
        Error Record &lt;n&gt; Pseudo-fault Generation Feature Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errnstatus.html">ERR&lt;n&gt;STATUS</a>:
        Error Record &lt;n&gt; Primary Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-erracr.html">ERRACR</a>:
        Access Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errcidr0.html">ERRCIDR0</a>:
        Component Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errcidr1.html">ERRCIDR1</a>:
        Component Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errcidr2.html">ERRCIDR2</a>:
        Component Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errcidr3.html">ERRCIDR3</a>:
        Component Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errcricr0.html">ERRCRICR0</a>:
        Critical Error Interrupt Configuration Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errcricr1.html">ERRCRICR1</a>:
        Critical Error Interrupt Configuration Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errcricr2.html">ERRCRICR2</a>:
        Critical Error Interrupt Configuration Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errdevaff.html">ERRDEVAFF</a>:
        Device Affinity Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errdevarch.html">ERRDEVARCH</a>:
        Device Architecture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errdevid.html">ERRDEVID</a>:
        Device Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errericr0.html">ERRERICR0</a>:
        Error Recovery Interrupt Configuration Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errericr1.html">ERRERICR1</a>:
        Error Recovery Interrupt Configuration Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errericr2.html">ERRERICR2</a>:
        Error Recovery Interrupt Configuration Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errfhicr0.html">ERRFHICR0</a>:
        Fault Handling Interrupt Configuration Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errfhicr1.html">ERRFHICR1</a>:
        Fault Handling Interrupt Configuration Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errfhicr2.html">ERRFHICR2</a>:
        Fault Handling Interrupt Configuration Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errgsr.html">ERRGSR</a>:
        Error Group Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-erriidr.html">ERRIIDR</a>:
        Implementation Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errimpdefn.html">ERRIMPDEF&lt;n&gt;</a>:
        IMPLEMENTATION DEFINED Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errirqcrn.html">ERRIRQCR&lt;n&gt;</a>:
        Generic Error Interrupt Configuration Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errirqsr.html">ERRIRQSR</a>:
        Error Interrupt Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errpidr0.html">ERRPIDR0</a>:
        Peripheral Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errpidr1.html">ERRPIDR1</a>:
        Peripheral Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errpidr2.html">ERRPIDR2</a>:
        Peripheral Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errpidr3.html">ERRPIDR3</a>:
        Peripheral Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-errpidr4.html">ERRPIDR4</a>:
        Peripheral Identification Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_abpr.html">GICC_ABPR</a>:
        CPU Interface Aliased Binary Point Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_aeoir.html">GICC_AEOIR</a>:
        CPU Interface Aliased End Of Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_ahppir.html">GICC_AHPPIR</a>:
        CPU Interface Aliased Highest Priority Pending Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_aiar.html">GICC_AIAR</a>:
        CPU Interface Aliased Interrupt Acknowledge Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_aprn.html">GICC_APR&lt;n&gt;</a>:
        CPU Interface Active Priorities Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_bpr.html">GICC_BPR</a>:
        CPU Interface Binary Point Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_ctlr.html">GICC_CTLR</a>:
        CPU Interface Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_dir.html">GICC_DIR</a>:
        CPU Interface Deactivate Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_eoir.html">GICC_EOIR</a>:
        CPU Interface End Of Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_hppir.html">GICC_HPPIR</a>:
        CPU Interface Highest Priority Pending Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_iar.html">GICC_IAR</a>:
        CPU Interface Interrupt Acknowledge Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_iidr.html">GICC_IIDR</a>:
        CPU Interface Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_nsaprn.html">GICC_NSAPR&lt;n&gt;</a>:
        CPU Interface Non-secure Active Priorities Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_pmr.html">GICC_PMR</a>:
        CPU Interface Priority Mask Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_rpr.html">GICC_RPR</a>:
        CPU Interface Running Priority Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicc_statusr.html">GICC_STATUSR</a>:
        CPU Interface Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_clrspi_nsr.html">GICD_CLRSPI_NSR</a>:
        Clear Non-secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_clrspi_sr.html">GICD_CLRSPI_SR</a>:
        Clear Secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_cpendsgirn.html">GICD_CPENDSGIR&lt;n&gt;</a>:
        SGI Clear-Pending Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_ctlr.html">GICD_CTLR</a>:
        Distributor Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icactivern.html">GICD_ICACTIVER&lt;n&gt;</a>:
        Interrupt Clear-Active Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icactiverne.html">GICD_ICACTIVER&lt;n&gt;E</a>:
        Interrupt Clear-Active Registers (extended SPI range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icenablern.html">GICD_ICENABLER&lt;n&gt;</a>:
        Interrupt Clear-Enable Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icenablerne.html">GICD_ICENABLER&lt;n&gt;E</a>:
        Interrupt Clear-Enable Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icfgrn.html">GICD_ICFGR&lt;n&gt;</a>:
        Interrupt Configuration Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icfgrne.html">GICD_ICFGR&lt;n&gt;E</a>:
        Interrupt Configuration Registers (Extended SPI Range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icpendrn.html">GICD_ICPENDR&lt;n&gt;</a>:
        Interrupt Clear-Pending Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_icpendrne.html">GICD_ICPENDR&lt;n&gt;E</a>:
        Interrupt Clear-Pending Registers (extended SPI range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_igrouprn.html">GICD_IGROUPR&lt;n&gt;</a>:
        Interrupt Group Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_igrouprne.html">GICD_IGROUPR&lt;n&gt;E</a>:
        Interrupt Group Registers (extended SPI range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_igrpmodrn.html">GICD_IGRPMODR&lt;n&gt;</a>:
        Interrupt Group Modifier Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_igrpmodrne.html">GICD_IGRPMODR&lt;n&gt;E</a>:
        Interrupt Group Modifier Registers (extended SPI range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_iidr.html">GICD_IIDR</a>:
        Distributor Implementer Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_inmirn.html">GICD_INMIR&lt;n&gt;</a>:
        Non-maskable Interrupt Registers, x = 0 to 31</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_inmirne.html">GICD_INMIR&lt;n&gt;E</a>:
        Non-maskable Interrupt Registers for Extended SPIs, x = 0 to 31</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_ipriorityrn.html">GICD_IPRIORITYR&lt;n&gt;</a>:
        Interrupt Priority Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_ipriorityrne.html">GICD_IPRIORITYR&lt;n&gt;E</a>:
        Holds the priority of the corresponding interrupt for each extended SPI supported by the GIC.</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_iroutern.html">GICD_IROUTER&lt;n&gt;</a>:
        Interrupt Routing Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_irouterne.html">GICD_IROUTER&lt;n&gt;E</a>:
        Interrupt Routing Registers (Extended SPI Range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_isactivern.html">GICD_ISACTIVER&lt;n&gt;</a>:
        Interrupt Set-Active Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_isactiverne.html">GICD_ISACTIVER&lt;n&gt;E</a>:
        Interrupt Set-Active Registers (extended SPI range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_isenablern.html">GICD_ISENABLER&lt;n&gt;</a>:
        Interrupt Set-Enable Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_isenablerne.html">GICD_ISENABLER&lt;n&gt;E</a>:
        Interrupt Set-Enable Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_ispendrn.html">GICD_ISPENDR&lt;n&gt;</a>:
        Interrupt Set-Pending Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_ispendrne.html">GICD_ISPENDR&lt;n&gt;E</a>:
        Interrupt Set-Pending Registers (extended SPI range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_itargetsrn.html">GICD_ITARGETSR&lt;n&gt;</a>:
        Interrupt Processor Targets Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_nsacrn.html">GICD_NSACR&lt;n&gt;</a>:
        Non-secure Access Control Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_nsacrne.html">GICD_NSACR&lt;n&gt;E</a>:
        Non-secure Access Control Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_setspi_nsr.html">GICD_SETSPI_NSR</a>:
        Set Non-secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_setspi_sr.html">GICD_SETSPI_SR</a>:
        Set Secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_sgir.html">GICD_SGIR</a>:
        Software Generated Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_spendsgirn.html">GICD_SPENDSGIR&lt;n&gt;</a>:
        SGI Set-Pending Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_statusr.html">GICD_STATUSR</a>:
        Error Reporting Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_typer.html">GICD_TYPER</a>:
        Interrupt Controller Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicd_typer2.html">GICD_TYPER2</a>:
        Interrupt Controller Type Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_aprn.html">GICH_APR&lt;n&gt;</a>:
        Active Priorities Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_eisr.html">GICH_EISR</a>:
        End Interrupt Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_elrsr.html">GICH_ELRSR</a>:
        Empty List Register Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_hcr.html">GICH_HCR</a>:
        Hypervisor Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_lrn.html">GICH_LR&lt;n&gt;</a>:
        List Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_misr.html">GICH_MISR</a>:
        Maintenance Interrupt Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_vmcr.html">GICH_VMCR</a>:
        Virtual Machine Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gich_vtr.html">GICH_VTR</a>:
        Virtual Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicm_clrspi_nsr.html">GICM_CLRSPI_NSR</a>:
        Clear Non-secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicm_clrspi_sr.html">GICM_CLRSPI_SR</a>:
        Clear Secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicm_iidr.html">GICM_IIDR</a>:
        Distributor Implementer Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicm_setspi_nsr.html">GICM_SETSPI_NSR</a>:
        Set Non-secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicm_setspi_sr.html">GICM_SETSPI_SR</a>:
        Set Secure SPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicm_typer.html">GICM_TYPER</a>:
        Distributor MSI Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_clrlpir.html">GICR_CLRLPIR</a>:
        Clear LPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_ctlr.html">GICR_CTLR</a>:
        Redistributor Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icactiver0.html">GICR_ICACTIVER0</a>:
        Interrupt Clear-Active Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icactiverne.html">GICR_ICACTIVER&lt;n&gt;E</a>:
        Interrupt Clear-Active Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icenabler0.html">GICR_ICENABLER0</a>:
        Interrupt Clear-Enable Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icenablerne.html">GICR_ICENABLER&lt;n&gt;E</a>:
        Interrupt Clear-Enable Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icfgr0.html">GICR_ICFGR0</a>:
        Interrupt Configuration Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icfgr1.html">GICR_ICFGR1</a>:
        Interrupt Configuration Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icfgrne.html">GICR_ICFGR&lt;n&gt;E</a>:
        Interrupt configuration registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icpendr0.html">GICR_ICPENDR0</a>:
        Interrupt Clear-Pending Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_icpendrne.html">GICR_ICPENDR&lt;n&gt;E</a>:
        Interrupt Clear-Pending Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_igroupr0.html">GICR_IGROUPR0</a>:
        Interrupt Group Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_igrouprne.html">GICR_IGROUPR&lt;n&gt;E</a>:
        Interrupt Group Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_igrpmodr0.html">GICR_IGRPMODR0</a>:
        Interrupt Group Modifier Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_igrpmodrne.html">GICR_IGRPMODR&lt;n&gt;E</a>:
        Interrupt Group Modifier Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_iidr.html">GICR_IIDR</a>:
        Redistributor Implementer Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_inmir0.html">GICR_INMIR0</a>:
        Non-maskable Interrupt Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_inmirne.html">GICR_INMIR&lt;n&gt;E</a>:
        Non-maskable Interrupt Registers for Extended PPIs, x = 1 to 2.</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_invallr.html">GICR_INVALLR</a>:
        Redistributor Invalidate All Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_invlpir.html">GICR_INVLPIR</a>:
        Redistributor Invalidate LPI Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_ipriorityrn.html">GICR_IPRIORITYR&lt;n&gt;</a>:
        Interrupt Priority Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_ipriorityrne.html">GICR_IPRIORITYR&lt;n&gt;E</a>:
        Interrupt Priority Registers (extended PPI range)</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_isactiver0.html">GICR_ISACTIVER0</a>:
        Interrupt Set-Active Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_isactiverne.html">GICR_ISACTIVER&lt;n&gt;E</a>:
        Interrupt Set-Active Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_isenabler0.html">GICR_ISENABLER0</a>:
        Interrupt Set-Enable Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_isenablerne.html">GICR_ISENABLER&lt;n&gt;E</a>:
        Interrupt Set-Enable Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_ispendr0.html">GICR_ISPENDR0</a>:
        Interrupt Set-Pending Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_ispendrne.html">GICR_ISPENDR&lt;n&gt;E</a>:
        Interrupt Set-Pending Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_mpamidr.html">GICR_MPAMIDR</a>:
        Report maximum PARTID and PMG Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_nsacr.html">GICR_NSACR</a>:
        Non-secure Access Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_partidr.html">GICR_PARTIDR</a>:
        Set PARTID and PMG Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_pendbaser.html">GICR_PENDBASER</a>:
        Redistributor LPI Pending Table Base Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_propbaser.html">GICR_PROPBASER</a>:
        Redistributor Properties Base Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_setlpir.html">GICR_SETLPIR</a>:
        Set LPI Pending Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_statusr.html">GICR_STATUSR</a>:
        Error Reporting Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_syncr.html">GICR_SYNCR</a>:
        Redistributor Synchronize Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_typer.html">GICR_TYPER</a>:
        Redistributor Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_vpendbaser.html">GICR_VPENDBASER</a>:
        Virtual Redistributor LPI Pending Table Base Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_vpropbaser.html">GICR_VPROPBASER</a>:
        Virtual Redistributor Properties Base Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_vsgipendr.html">GICR_VSGIPENDR</a>:
        Redistributor virtual SGI pending state register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_vsgir.html">GICR_VSGIR</a>:
        Redistributor virtual SGI pending state request register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicr_waker.html">GICR_WAKER</a>:
        Redistributor Wake Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_abpr.html">GICV_ABPR</a>:
        Virtual Machine Aliased Binary Point Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_aeoir.html">GICV_AEOIR</a>:
        Virtual Machine Aliased End Of Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_ahppir.html">GICV_AHPPIR</a>:
        Virtual Machine Aliased Highest Priority Pending Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_aiar.html">GICV_AIAR</a>:
        Virtual Machine Aliased Interrupt Acknowledge Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_aprn.html">GICV_APR&lt;n&gt;</a>:
        Virtual Machine Active Priorities Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_bpr.html">GICV_BPR</a>:
        Virtual Machine Binary Point Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_ctlr.html">GICV_CTLR</a>:
        Virtual Machine Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_dir.html">GICV_DIR</a>:
        Virtual Machine Deactivate Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_eoir.html">GICV_EOIR</a>:
        Virtual Machine End Of Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_hppir.html">GICV_HPPIR</a>:
        Virtual Machine Highest Priority Pending Interrupt Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_iar.html">GICV_IAR</a>:
        Virtual Machine Interrupt Acknowledge Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_iidr.html">GICV_IIDR</a>:
        Virtual Machine CPU Interface Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_pmr.html">GICV_PMR</a>:
        Virtual Machine Priority Mask Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_rpr.html">GICV_RPR</a>:
        Virtual Machine Running Priority Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gicv_statusr.html">GICV_STATUSR</a>:
        Virtual Machine Error Reporting Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_basern.html">GITS_BASER&lt;n&gt;</a>:
        ITS Translation Table Descriptors</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_cbaser.html">GITS_CBASER</a>:
        ITS Command Queue Descriptor</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_creadr.html">GITS_CREADR</a>:
        ITS Read Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_ctlr.html">GITS_CTLR</a>:
        ITS Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_cwriter.html">GITS_CWRITER</a>:
        ITS Write Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_iidr.html">GITS_IIDR</a>:
        ITS Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_mpamidr.html">GITS_MPAMIDR</a>:
        Report maximum PARTID and PMG Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_mpidr.html">GITS_MPIDR</a>:
        Report ITS's affinity.</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_partidr.html">GITS_PARTIDR</a>:
        Set PARTID and PMG Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_sgir.html">GITS_SGIR</a>:
        ITS SGI Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_statusr.html">GITS_STATUSR</a>:
        ITS Error Reporting Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_translater.html">GITS_TRANSLATER</a>:
        ITS Translation Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_typer.html">GITS_TYPER</a>:
        ITS Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-gits_umsir.html">GITS_UMSIR</a>:
        ITS Unmapped MSI register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-midr_el1.html">MIDR_EL1</a>:
        Main ID Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_cassoc.html">MPAMCFG_CASSOC</a>:
        MPAM Cache Maximum Associativity Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_cmax.html">MPAMCFG_CMAX</a>:
        MPAM Cache Maximum Capacity Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_cmin.html">MPAMCFG_CMIN</a>:
        MPAM Cache Minimum Capacity Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_cpbmn.html">MPAMCFG_CPBM&lt;n&gt;</a>:
        MPAM Cache Portion Bitmap Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_dis.html">MPAMCFG_DIS</a>:
        MPAM Partition Configuration Disable Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_en.html">MPAMCFG_EN</a>:
        MPAM Partition Configuration Enable Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_en_flags.html">MPAMCFG_EN_FLAGS</a>:
        MPAM Partition Configuration Enable Flags Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_intpartid.html">MPAMCFG_INTPARTID</a>:
        MPAM Internal PARTID Narrowing Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_mbw_max.html">MPAMCFG_MBW_MAX</a>:
        MPAM Memory Bandwidth Maximum Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_mbw_min.html">MPAMCFG_MBW_MIN</a>:
        MPAM Memory Bandwidth Minimum Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_mbw_pbmn.html">MPAMCFG_MBW_PBM&lt;n&gt;</a>:
        MPAM Bandwidth Portion Bitmap Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_mbw_prop.html">MPAMCFG_MBW_PROP</a>:
        MPAM Memory Bandwidth Proportional Stride Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_mbw_winwd.html">MPAMCFG_MBW_WINWD</a>:
        MPAM Memory Bandwidth Partitioning Window Width Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_part_sel.html">MPAMCFG_PART_SEL</a>:
        MPAM Partition Configuration Selection Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamcfg_pri.html">MPAMCFG_PRI</a>:
        MPAM Priority Partition Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_aidr.html">MPAMF_AIDR</a>:
        MPAM Architecture Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_ccap_idr.html">MPAMF_CCAP_IDR</a>:
        MPAM Features Cache Capacity Partitioning ID register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_cpor_idr.html">MPAMF_CPOR_IDR</a>:
        MPAM Features Cache Portion Partitioning ID register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_csumon_idr.html">MPAMF_CSUMON_IDR</a>:
        MPAM Features Cache Storage Usage Monitoring ID register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_ecr.html">MPAMF_ECR</a>:
        MPAM Error Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_err_msi_addr_h.html">MPAMF_ERR_MSI_ADDR_H</a>:
        MPAM Error MSI High-part Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_err_msi_addr_l.html">MPAMF_ERR_MSI_ADDR_L</a>:
        MPAM Error MSI Low-part Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_err_msi_attr.html">MPAMF_ERR_MSI_ATTR</a>:
        MPAM Error MSI Write Attributes Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_err_msi_data.html">MPAMF_ERR_MSI_DATA</a>:
        MPAM Error MSI Data Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_err_msi_mpam.html">MPAMF_ERR_MSI_MPAM</a>:
        MPAM Error MSI Write MPAM Information Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_esr.html">MPAMF_ESR</a>:
        MPAM Error Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_idr.html">MPAMF_IDR</a>:
        MPAM Features Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_iidr.html">MPAMF_IIDR</a>:
        MPAM Implementation Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_impl_idr.html">MPAMF_IMPL_IDR</a>:
        MPAM Implementation-Specific Partitioning Feature Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_mbwumon_idr.html">MPAMF_MBWUMON_IDR</a>:
        MPAM Features Memory Bandwidth Usage Monitoring ID register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_mbw_idr.html">MPAMF_MBW_IDR</a>:
        MPAM Memory Bandwidth Partitioning Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_msmon_idr.html">MPAMF_MSMON_IDR</a>:
        MPAM Resource Monitoring Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_partid_nrw_idr.html">MPAMF_PARTID_NRW_IDR</a>:
        MPAM PARTID Narrowing ID register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_pri_idr.html">MPAMF_PRI_IDR</a>:
        MPAM Priority Partitioning Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-mpamf_sidr.html">MPAMF_SIDR</a>:
        MPAM Features Secure Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_capt_evnt.html">MSMON_CAPT_EVNT</a>:
        MPAM Capture Event Generation Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_cfg_csu_ctl.html">MSMON_CFG_CSU_CTL</a>:
        MPAM Memory System Monitor Configure Cache Storage Usage Monitor Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_cfg_csu_flt.html">MSMON_CFG_CSU_FLT</a>:
        MPAM Memory System Monitor Configure Cache Storage Usage Monitor Filter Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_cfg_mbwu_ctl.html">MSMON_CFG_MBWU_CTL</a>:
        MPAM Memory System Monitor Configure Memory Bandwidth Usage Monitor Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_cfg_mbwu_flt.html">MSMON_CFG_MBWU_FLT</a>:
        MPAM Memory System Monitor Configure Memory Bandwidth Usage Monitor Filter Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_cfg_mon_sel.html">MSMON_CFG_MON_SEL</a>:
        MPAM Monitor Instance Selection Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_csu.html">MSMON_CSU</a>:
        MPAM Cache Storage Usage Monitor Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_csu_capture.html">MSMON_CSU_CAPTURE</a>:
        MPAM Cache Storage Usage Monitor Capture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_csu_ofsr.html">MSMON_CSU_OFSR</a>:
        MPAM CSU Monitor Overflow Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_mbwu.html">MSMON_MBWU</a>:
        MPAM Memory Bandwidth Usage Monitor Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_mbwu_capture.html">MSMON_MBWU_CAPTURE</a>:
        MPAM Memory Bandwidth Usage Monitor Capture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_mbwu_l.html">MSMON_MBWU_L</a>:
        MPAM Long Memory Bandwidth Usage Monitor Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_mbwu_l_capture.html">MSMON_MBWU_L_CAPTURE</a>:
        MPAM Long Memory Bandwidth Usage Monitor Capture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_mbwu_ofsr.html">MSMON_MBWU_OFSR</a>:
        MPAM MBWU Monitor Overflow Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_oflow_msi_addr_h.html">MSMON_OFLOW_MSI_ADDR_H</a>:
        MPAM Monitor Overflow MSI Write High-part Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_oflow_msi_addr_l.html">MSMON_OFLOW_MSI_ADDR_L</a>:
        MPAM Monitor Overflow MSI Low-part Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_oflow_msi_attr.html">MSMON_OFLOW_MSI_ATTR</a>:
        MPAM Monitor Overflow MSI Write Attributes Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_oflow_msi_data.html">MSMON_OFLOW_MSI_DATA</a>:
        MPAM Monitor Overflow MSI Write Data Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_oflow_msi_mpam.html">MSMON_OFLOW_MSI_MPAM</a>:
        MPAM Monitor Overflow MSI Write MPAM Information Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-msmon_oflow_sr.html">MSMON_OFLOW_SR</a>:
        MPAM Monitor Overflow Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-oslar_el1.html">OSLAR_EL1</a>:
        OS Lock Access Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmauthstatus.html">PMAUTHSTATUS</a>:
        Performance Monitors Authentication Status register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmccfiltr_el0.html">PMCCFILTR_EL0</a>:
        Performance Monitors Cycle Counter Filter Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmccidsr.html">PMCCIDSR</a>:
        CONTEXTIDR_ELx Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmccntr_el0.html">PMCCNTR_EL0</a>:
        Performance Monitors Cycle Counter</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmccntsvr_el1.html">PMCCNTSVR_EL1</a>:
        Performance Monitors Cycle Count Saved Value Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmceid0.html">PMCEID0</a>:
        Performance Monitors Common Event Identification register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmceid1.html">PMCEID1</a>:
        Performance Monitors Common Event Identification register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmceid2.html">PMCEID2</a>:
        Performance Monitors Common Event Identification register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmceid3.html">PMCEID3</a>:
        Performance Monitors Common Event Identification register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcfgr.html">PMCFGR</a>:
        Performance Monitors Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcgcr0.html">PMCGCR0</a>:
        Counter Group Configuration Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcid1sr.html">PMCID1SR</a>:
        CONTEXTIDR_EL1 Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcid2sr.html">PMCID2SR</a>:
        CONTEXTIDR_EL2 Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcidr0.html">PMCIDR0</a>:
        Performance Monitors Component Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcidr1.html">PMCIDR1</a>:
        Performance Monitors Component Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcidr2.html">PMCIDR2</a>:
        Performance Monitors Component Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcidr3.html">PMCIDR3</a>:
        Performance Monitors Component Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcnten.html">PMCNTEN</a>:
        Performance Monitors Count Enable register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcntenclr_el0.html">PMCNTENCLR_EL0</a>:
        Performance Monitors Count Enable Clear Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcntenset_el0.html">PMCNTENSET_EL0</a>:
        Performance Monitors Count Enable Set Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmcr_el0.html">PMCR_EL0</a>:
        Performance Monitors Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmdevaff.html">PMDEVAFF</a>:
        Performance Monitors Device Affinity register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmdevaff0.html">PMDEVAFF0</a>:
        Performance Monitors Device Affinity register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmdevaff1.html">PMDEVAFF1</a>:
        Performance Monitors Device Affinity register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmdevarch.html">PMDEVARCH</a>:
        Performance Monitors Device Architecture register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmdevid.html">PMDEVID</a>:
        Performance Monitors Device ID register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmdevtype.html">PMDEVTYPE</a>:
        Performance Monitors Device Type register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmevcntrn_el0.html">PMEVCNTR&lt;n&gt;_EL0</a>:
        Performance Monitors Event Count Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmevcntsvrn_el1.html">PMEVCNTSVR&lt;n&gt;_EL1</a>:
        Performance Monitors Event Count Saved Value Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmevfilt2rn.html">PMEVFILT2R&lt;n&gt;</a>:
        Performance Monitors Event Filter Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmevtypern_el0.html">PMEVTYPER&lt;n&gt;_EL0</a>:
        Performance Monitors Event Type Registers</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmicfiltr_el0.html">PMICFILTR_EL0</a>:
        Performance Monitors Instruction Counter Filter Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmicntr_el0.html">PMICNTR_EL0</a>:
        Performance Monitors Instruction Counter Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmicntsvr_el1.html">PMICNTSVR_EL1</a>:
        Performance Monitors Instruction Count Saved Value Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmiidr.html">PMIIDR</a>:
        Performance Monitors Implementation Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pminten.html">PMINTEN</a>:
        Performance Monitors Interrupt Enable register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmintenclr_el1.html">PMINTENCLR_EL1</a>:
        Performance Monitors Interrupt Enable Clear Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmintenset_el1.html">PMINTENSET_EL1</a>:
        Performance Monitors Interrupt Enable Set Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmitctrl.html">PMITCTRL</a>:
        Performance Monitors Integration mode Control register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmlar.html">PMLAR</a>:
        Performance Monitors Lock Access Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmlsr.html">PMLSR</a>:
        Performance Monitors Lock Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmmir.html">PMMIR</a>:
        Performance Monitors Machine Identification Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmovs.html">PMOVS</a>:
        Performance Monitors Overflow Flag Status register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmovsclr_el0.html">PMOVSCLR_EL0</a>:
        Performance Monitors Overflow Flag Status Clear register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmovsset_el0.html">PMOVSSET_EL0</a>:
        Performance Monitors Overflow Flag Status Set Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmpcsctl.html">PMPCSCTL</a>:
        PC Sample-based Profiling Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmpcsr.html">PMPCSR</a>:
        Program Counter Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmpidr0.html">PMPIDR0</a>:
        Performance Monitors Peripheral Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmpidr1.html">PMPIDR1</a>:
        Performance Monitors Peripheral Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmpidr2.html">PMPIDR2</a>:
        Performance Monitors Peripheral Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmpidr3.html">PMPIDR3</a>:
        Performance Monitors Peripheral Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmpidr4.html">PMPIDR4</a>:
        Performance Monitors Peripheral Identification Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmsscr_el1.html">PMSSCR_EL1</a>:
        Performance Monitors Snapshot Status and Capture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmswinc_el0.html">PMSWINC_EL0</a>:
        Performance Monitors Software Increment Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmvcidsr.html">PMVCIDSR</a>:
        CONTEXTIDR_EL1 and VMID Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmvidsr.html">PMVIDSR</a>:
        VMID Sample Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="pmu.pmzr_el0.html">PMZR_EL0</a>:
        Performance Monitors Zero with Mask</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbauthstatus.html">TRBAUTHSTATUS</a>:
        Authentication Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbbaser_el1.html">TRBBASER_EL1</a>:
        Trace Buffer Base Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbcidr0.html">TRBCIDR0</a>:
        Component Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbcidr1.html">TRBCIDR1</a>:
        Component Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbcidr2.html">TRBCIDR2</a>:
        Component Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbcidr3.html">TRBCIDR3</a>:
        Component Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbcr.html">TRBCR</a>:
        Trace Buffer Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbdevaff.html">TRBDEVAFF</a>:
        Device Affinity Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbdevarch.html">TRBDEVARCH</a>:
        Trace Buffer Device Architecture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbdevid.html">TRBDEVID</a>:
        Device Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbdevid1.html">TRBDEVID1</a>:
        Device Configuration Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbdevid2.html">TRBDEVID2</a>:
        Device Configuration Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbdevtype.html">TRBDEVTYPE</a>:
        Device Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbidr_el1.html">TRBIDR_EL1</a>:
        Trace Buffer ID Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbitctrl.html">TRBITCTRL</a>:
        Integration Mode Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trblar.html">TRBLAR</a>:
        Lock Access Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trblimitr_el1.html">TRBLIMITR_EL1</a>:
        Trace Buffer Limit Address Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trblsr.html">TRBLSR</a>:
        Lock Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbmar_el1.html">TRBMAR_EL1</a>:
        Trace Buffer Memory Attribute Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbmpam_el1.html">TRBMPAM_EL1</a>:
        Trace Buffer MPAM Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr0.html">TRBPIDR0</a>:
        Peripheral Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr1.html">TRBPIDR1</a>:
        Peripheral Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr2.html">TRBPIDR2</a>:
        Peripheral Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr3.html">TRBPIDR3</a>:
        Peripheral Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr4.html">TRBPIDR4</a>:
        Peripheral Identification Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr5.html">TRBPIDR5</a>:
        Peripheral Identification Register 5</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr6.html">TRBPIDR6</a>:
        Peripheral Identification Register 6</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbpidr7.html">TRBPIDR7</a>:
        Peripheral Identification Register 7</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbptr_el1.html">TRBPTR_EL1</a>:
        Trace Buffer Write Pointer Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbsr_el1.html">TRBSR_EL1</a>:
        Trace Buffer Status/syndrome Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trbtrg_el1.html">TRBTRG_EL1</a>:
        Trace Buffer Trigger Counter Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcacatrn.html">TRCACATR&lt;n&gt;</a>:
        Address Comparator Access Type Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcacvrn.html">TRCACVR&lt;n&gt;</a>:
        Address Comparator Value Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcauthstatus.html">TRCAUTHSTATUS</a>:
        Authentication Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcauxctlr.html">TRCAUXCTLR</a>:
        Auxiliary Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcbbctlr.html">TRCBBCTLR</a>:
        Branch Broadcast Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcccctlr.html">TRCCCCTLR</a>:
        Cycle Count Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccidcctlr0.html">TRCCIDCCTLR0</a>:
        Context Identifier Comparator Control Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccidcctlr1.html">TRCCIDCCTLR1</a>:
        Context Identifier Comparator Control Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccidcvrn.html">TRCCIDCVR&lt;n&gt;</a>:
        Context Identifier Comparator Value Registers &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccidr0.html">TRCCIDR0</a>:
        Component Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccidr1.html">TRCCIDR1</a>:
        Component Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccidr2.html">TRCCIDR2</a>:
        Component Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccidr3.html">TRCCIDR3</a>:
        Component Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcclaimclr.html">TRCCLAIMCLR</a>:
        Claim Tag Clear Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcclaimset.html">TRCCLAIMSET</a>:
        Claim Tag Set Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccntctlrn.html">TRCCNTCTLR&lt;n&gt;</a>:
        Counter Control Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccntrldvrn.html">TRCCNTRLDVR&lt;n&gt;</a>:
        Counter Reload Value Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trccntvrn.html">TRCCNTVR&lt;n&gt;</a>:
        Counter Value Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcconfigr.html">TRCCONFIGR</a>:
        Trace Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcdevaff.html">TRCDEVAFF</a>:
        Device Affinity Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcdevarch.html">TRCDEVARCH</a>:
        Device Architecture Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcdevid.html">TRCDEVID</a>:
        Device Configuration Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcdevid1.html">TRCDEVID1</a>:
        Device Configuration Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcdevid2.html">TRCDEVID2</a>:
        Device Configuration Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcdevtype.html">TRCDEVTYPE</a>:
        Device Type Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trceventctl0r.html">TRCEVENTCTL0R</a>:
        Event Control 0 Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trceventctl1r.html">TRCEVENTCTL1R</a>:
        Event Control 1 Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcextinselrn.html">TRCEXTINSELR&lt;n&gt;</a>:
        External Input Select Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr0.html">TRCIDR0</a>:
        ID Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr1.html">TRCIDR1</a>:
        ID Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr10.html">TRCIDR10</a>:
        ID Register 10</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr11.html">TRCIDR11</a>:
        ID Register 11</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr12.html">TRCIDR12</a>:
        ID Register 12</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr13.html">TRCIDR13</a>:
        ID Register 13</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr2.html">TRCIDR2</a>:
        ID Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr3.html">TRCIDR3</a>:
        ID Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr4.html">TRCIDR4</a>:
        ID Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr5.html">TRCIDR5</a>:
        ID Register 5</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr6.html">TRCIDR6</a>:
        ID Register 6</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr7.html">TRCIDR7</a>:
        ID Register 7</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr8.html">TRCIDR8</a>:
        ID Register 8</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcidr9.html">TRCIDR9</a>:
        ID Register 9</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcimspec0.html">TRCIMSPEC0</a>:
        IMP DEF Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcimspecn.html">TRCIMSPEC&lt;n&gt;</a>:
        IMP DEF Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcitctrl.html">TRCITCTRL</a>:
        Integration Mode Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trciteedcr.html">TRCITEEDCR</a>:
        Instrumentation Trace Extension External Debug Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trclar.html">TRCLAR</a>:
        Lock Access Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trclsr.html">TRCLSR</a>:
        Lock Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcoslsr.html">TRCOSLSR</a>:
        Trace OS Lock Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpdcr.html">TRCPDCR</a>:
        PowerDown Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpdsr.html">TRCPDSR</a>:
        PowerDown Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr0.html">TRCPIDR0</a>:
        Peripheral Identification Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr1.html">TRCPIDR1</a>:
        Peripheral Identification Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr2.html">TRCPIDR2</a>:
        Peripheral Identification Register 2</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr3.html">TRCPIDR3</a>:
        Peripheral Identification Register 3</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr4.html">TRCPIDR4</a>:
        Peripheral Identification Register 4</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr5.html">TRCPIDR5</a>:
        Peripheral Identification Register 5</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr6.html">TRCPIDR6</a>:
        Peripheral Identification Register 6</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcpidr7.html">TRCPIDR7</a>:
        Peripheral Identification Register 7</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcprgctlr.html">TRCPRGCTLR</a>:
        Programming Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcqctlr.html">TRCQCTLR</a>:
        Q Element Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcrsctlrn.html">TRCRSCTLR&lt;n&gt;</a>:
        Resource Selection Control Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcrsr.html">TRCRSR</a>:
        Resources Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcseqevrn.html">TRCSEQEVR&lt;n&gt;</a>:
        Sequencer State Transition Control Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcseqrstevr.html">TRCSEQRSTEVR</a>:
        Sequencer Reset Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcseqstr.html">TRCSEQSTR</a>:
        Sequencer State Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcssccrn.html">TRCSSCCR&lt;n&gt;</a>:
        Single-shot Comparator Control Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcsscsrn.html">TRCSSCSR&lt;n&gt;</a>:
        Single-shot Comparator Control Status Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcsspcicrn.html">TRCSSPCICR&lt;n&gt;</a>:
        Single-shot Processing Element Comparator Input Control Register &lt;n&gt;</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcstallctlr.html">TRCSTALLCTLR</a>:
        Stall Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcstatr.html">TRCSTATR</a>:
        Trace Status Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcsyncpr.html">TRCSYNCPR</a>:
        Synchronization Period Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trctraceidr.html">TRCTRACEIDR</a>:
        Trace ID Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trctsctlr.html">TRCTSCTLR</a>:
        Timestamp Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcvictlr.html">TRCVICTLR</a>:
        ViewInst Main Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcviiectlr.html">TRCVIIECTLR</a>:
        ViewInst Include/Exclude Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcvipcssctlr.html">TRCVIPCSSCTLR</a>:
        ViewInst Start/Stop PE Comparator Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcvissctlr.html">TRCVISSCTLR</a>:
        ViewInst Start/Stop Control Register</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcvmidcctlr0.html">TRCVMIDCCTLR0</a>:
        Virtual Context Identifier Comparator Control Register 0</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcvmidcctlr1.html">TRCVMIDCCTLR1</a>:
        Virtual Context Identifier Comparator Control Register 1</span></p></div>
    <div><p class="iformindex"><span class="insnheading"><a href="ext-trcvmidcvrn.html">TRCVMIDCVR&lt;n&gt;</a>:
        Virtual Context Identifier Comparator Value Register &lt;n&gt;</span></p></div>
  <hr/><table style="margin: 0 auto;"><tr><td><div class="topbar"><a href="AArch32-regindex.html">AArch32 Registers</a></div></td><td><div class="topbar"><a href="AArch64-regindex.html">AArch64 Registers</a></div></td><td><div class="topbar"><a href="AArch32-sysindex.html">AArch32 Instructions</a></div></td><td><div class="topbar"><a href="AArch64-sysindex.html">AArch64 Instructions</a></div></td><td><div class="topbar"><a href="enc_index.html">Index by Encoding</a></div></td><td><div class="topbar"><a href="ext_alpha_index.html">External Registers</a></div></td><td><div class="topbar"><a href="ext_enc_index.html">External Registers by Offset</a></div></td><td><div class="topbar"><a href="func_index.html">Registers by Functional Group</a></div></td><td><div class="topbar"><a href="notice.html">Proprietary Notice</a></div></td></tr></table><p class="versions">30/03/2023 19:16</p><p class="copyconf">Copyright © 2010-2023 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.</p></body>
  
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